Why China still can't make the world's most advanced chips

In late 2025, Huawei launched a phone called the Mate 80. Inside it was the Kirin 9030, a processor built by SMIC, China's largest chipmaker, on a 5nm-class manufacturing process. The United States had spent three years trying to prevent exactly this. Export controls blocked China from buying the extreme ultraviolet lithography machines that every leading chipmaker uses to print circuits at this scale. SMIC built the chip without one, using older machines and a technique called multi-patterning. When the chip analysis firm TechInsights took the Kirin 9030 apart, it confirmed that SMIC had reached a genuine milestone. It also found that the transistor density roughly matched TSMC's N6 process, a node TSMC had been shipping since 2020. China's most advanced chip, built at enormous cost and effort, matched what the world's leading chipmaker had been doing for five years.

How SMIC got to 5nm

Much of SMIC's progress traces to one person. Liang Mong-Song is a Taiwanese electrical engineer with a PhD from UC Berkeley and more than 450 patents. He spent seventeen years at TSMC, where he rose to senior director of research and development and worked on the manufacturing processes that kept the company at the leading edge. After leaving TSMC he moved to Samsung, where he helped build its 14nm production line. In 2017, SMIC hired him as co-CEO.

Liang brought something that China's chip industry had spent billions trying to acquire: the manufacturing experience that determines whether a fab produces working chips or expensive waste.

Under Liang, SMIC moved faster than most analysts expected. In August 2023, Huawei released the Mate 60 Pro with a Kirin 9000s chip built on SMIC's 7nm-class process, the first time a Chinese chipmaker had produced a chip at that level. By late 2025, SMIC had pushed to 5nm-class with the Kirin 9030. Both chips were built using deep ultraviolet lithography, the older generation of printing machines that China can still buy. To reach finer detail than these machines can manage in a single pass, SMIC uses multi-patterning: printing each circuit layer multiple times, aligning each pass with nanometer precision.

Why the gap keeps growing

Multi-patterning works, but it is slow, expensive, and wasteful. With EUV, a chipmaker prints a circuit layer in one or two exposure passes. With the older DUV machines and multi-patterning, the same layer requires four or more passes, each one adding time and opportunities for defects. More passes mean more things that can go wrong. More defects mean fewer working chips per wafer.

The numbers are significant. SMIC's yields on its 5nm-class process are estimated at roughly a third of what TSMC achieves on an equivalent node. For every three working chips TSMC gets from a wafer, SMIC gets about one. The cost follows: analysts estimate that SMIC's 5nm wafers run 40 to 50 percent more expensive than TSMC's. For Huawei, which is banned from buying TSMC chips and has no alternative supplier, the premium is worth paying. For any customer with a choice, it is not.

Meanwhile TSMC keeps moving. In 2026, the company is ramping its 2nm process, which uses an entirely new transistor architecture called gate-all-around. Production capacity at 2nm is expected to reach roughly 100,000 wafers per month by the end of the year, and Apple, Nvidia, and Qualcomm are all in line for it. SMIC's most advanced output roughly matches the density of a TSMC node from 2020. In the first quarter of 2026, TSMC held about 73 percent of the global foundry market by revenue. SMIC held about 5 percent.

What $150 billion has not been able to buy

China has not been quiet about the effort. The government's Big Fund, a state investment vehicle dedicated to semiconductors, has run three rounds: the first in 2014 at about $22 billion, the second in 2019 at about $29 billion, and the third, launched in late 2024, at roughly $47 billion. Total state-directed semiconductor spending is estimated at well over $150 billion, and that figure likely undercounts provincial and local government investment.

The original target was ambitious: 70 percent chip self-sufficiency by 2025, set as part of the Made in China 2025 industrial plan. The actual rate is closer to 40 percent, and most of that is in older technology, the mature process nodes used in cars, appliances, and industrial equipment. In advanced logic chips, the kind that run AI models and flagship smartphones, China remains almost entirely dependent on foreign manufacturers or on SMIC's expensive, low-yield workarounds.

The equipment gap is severe. China's leading domestic lithography maker, Shanghai Micro Electronics Equipment, or SMEE, ships machines capable of about 90nm. TSMC is manufacturing at 2nm. The distance between those two numbers represents roughly twenty years of development.

But the deepest problem is not any single machine. It is what engineers call yield: the share of chips on a wafer that actually work. A chip goes through hundreds of manufacturing steps. At one step, a chemical vapor deposits a film a few atoms thick onto the wafer. At another, a plasma etches a trench into it. At another, the wafer is heated to drive a chemical dopant into the silicon. Each step has dozens of variables: chamber temperature, gas flow rates, exposure duration, pressure. A finished chip contains billions of transistors. If even a small fraction of them fail, the whole chip is dead.

When yields are low, the cause could be anywhere in that chain. A particle contamination at step 47. A gas flow that drifted slightly at step 112. A reaction between two materials that only shows up within a narrow temperature range. Finding the source means correlating defect patterns on finished wafers with process data from hundreds of earlier steps. An engineer at TSMC who has inspected ten thousand wafers can recognize a defect pattern and trace it to its cause in hours. A team at SMIC seeing the same pattern for the first time might need weeks of experiments to reach the same answer. That diagnostic knowledge accumulates person by person, failure by failure, across hundreds of specialists who each know their own stretch of the production line. TSMC has been building it since 1987. It is not written in a manual, and it does not transfer on a hard drive.

The fight over the top 10 percent

In 2023, TSMC's founder Morris Chang said that China's chipmaking was "at least five or six years" behind Taiwan's. That estimate still looks roughly right. But the framing matters. About 90 percent of the chips sold in the world are not leading-edge. Cars, factory equipment, home appliances, power grids, and most consumer electronics run on chips built at 28nm or older, nodes that Chinese fabs can handle well. SMIC is building new fabs across China, adding roughly 40,000 12-inch wafers per month of capacity in 2026, and most of that is aimed at this tier of the market.

The fight that export controls are about is the remaining fraction: the processors that train and run AI models, the chips in flagship smartphones, and the processors in advanced weapons systems. These are the chips that need 5nm or better, and these are the chips China cannot yet make at competitive cost or yield. Every Kirin processor that SMIC ships is a political achievement as much as a commercial product. Huawei pays the premium because it has no alternative, not because the economics work.

The pattern in other industries gives Beijing reason for confidence. In solar panels, electric vehicles, batteries, and robotics, China closed technology gaps that once looked permanent and eventually dominated global markets. But in each of those industries, building the factory largely transferred the knowledge needed to improve the product. The designs were licensable, the manufacturing processes were reproducible, and scale brought costs down on a predictable curve. Advanced chipmaking is different. The factory is only the beginning. The knowledge that makes it work takes decades to build, and so far, no amount of money has found a shortcut.